/**
 * defTS101.h
 *
 * Copyright (c) 2001 Analog Devices, Inc.,  All rights reserved
 */

#if !defined(__DEFTS101_H_)
#define __DEFTS101_H_


/* ****************************************************************** */
/* ***************************** Macros ***************************** */
/* ****************************************************************** */
/* Make a bit mask from a bit position */
#if !defined(MAKE_BITMASK_)
#define MAKE_BITMASK_(x_) (1<<(x_))      
#endif

/* Make a bit mask from a bit position (usable only in C) */
#if !defined(MAKE_LL_BITMASK_)
#define MAKE_LL_BITMASK_(x_) (1LL<<(x_))        
#endif


/* ****************************************************************** */
/* ****************** Unmapped Registers Defines  ******************* */
/* ****************************************************************** */

/* *************************** XSTAT ******************************** */
/* Bit positions */
#define XSTAT_AZ_P          ( 0)
#define XSTAT_AN_P          ( 1)
#define XSTAT_AV_P          ( 2)
#define XSTAT_AC_P          ( 3)
#define XSTAT_MZ_P          ( 4)
#define XSTAT_MN_P          ( 5)
#define XSTAT_MV_P          ( 6)
#define XSTAT_MU_P          ( 7)
#define XSTAT_SZ_P          ( 8)
#define XSTAT_SN_P          ( 9)
#define XSTAT_BF_P          (10)
#define XSTAT_AI_P          (12)
#define XSTAT_MI_P          (13)
#define XSTAT_UEN_P         (20)
#define XSTAT_OEN_P         (21)
#define XSTAT_IVEN_P        (22)
#define XSTAT_AUS_P         (24)
#define XSTAT_AVS_P         (25)
#define XSTAT_AOS_P         (26)
#define XSTAT_AIS_P         (27)
#define XSTAT_MUS_P         (28)
#define XSTAT_MVS_P         (29)
#define XSTAT_MOS_P         (30)
#define XSTAT_MIS_P         (31)

/* Bit Masks */
#define XSTAT_AZ            MAKE_BITMASK_(XSTAT_AZ_P)
#define XSTAT_AN            MAKE_BITMASK_(XSTAT_AN_P)
#define XSTAT_AV            MAKE_BITMASK_(XSTAT_AV_P)
#define XSTAT_AC            MAKE_BITMASK_(XSTAT_AC_P)
#define XSTAT_MZ            MAKE_BITMASK_(XSTAT_MZ_P)
#define XSTAT_MN            MAKE_BITMASK_(XSTAT_MN_P)
#define XSTAT_MV            MAKE_BITMASK_(XSTAT_MV_P)
#define XSTAT_MU            MAKE_BITMASK_(XSTAT_MU_P)
#define XSTAT_SZ            MAKE_BITMASK_(XSTAT_SZ_P)
#define XSTAT_SN            MAKE_BITMASK_(XSTAT_SN_P)
#define XSTAT_BF            MAKE_BITMASK_(XSTAT_BF_P)
#define XSTAT_AI            MAKE_BITMASK_(XSTAT_AI_P)
#define XSTAT_MI            MAKE_BITMASK_(XSTAT_MI_P)
#define XSTAT_UEN           MAKE_BITMASK_(XSTAT_UEN_P)
#define XSTAT_OEN           MAKE_BITMASK_(XSTAT_OEN_P)
#define XSTAT_IVEN          MAKE_BITMASK_(XSTAT_IVEN_P)
#define XSTAT_AUS           MAKE_BITMASK_(XSTAT_AUS_P)
#define XSTAT_AVS           MAKE_BITMASK_(XSTAT_AVS_P)
#define XSTAT_AOS           MAKE_BITMASK_(XSTAT_AOS_P)
#define XSTAT_AIS           MAKE_BITMASK_(XSTAT_AIS_P)
#define XSTAT_MUS           MAKE_BITMASK_(XSTAT_MUS_P)
#define XSTAT_MVS           MAKE_BITMASK_(XSTAT_MVS_P)
#define XSTAT_MOS           MAKE_BITMASK_(XSTAT_MOS_P)
#define XSTAT_MIS           MAKE_BITMASK_(XSTAT_MIS_P)

/* *************************** YSTAT ******************************** */
/* Bit positions */
#define YSTAT_AZ_P          ( 0)
#define YSTAT_AN_P          ( 1)
#define YSTAT_AV_P          ( 2)
#define YSTAT_AC_P          ( 3)
#define YSTAT_MZ_P          ( 4)
#define YSTAT_MN_P          ( 5)
#define YSTAT_MV_P          ( 6)
#define YSTAT_MU_P          ( 7)
#define YSTAT_SZ_P          ( 8)
#define YSTAT_SN_P          ( 9)
#define YSTAT_BF_P          (10)
#define YSTAT_AI_P          (12)
#define YSTAT_MI_P          (13)
#define YSTAT_UEN_P         (20)
#define YSTAT_OEN_P         (21)
#define YSTAT_IVEN_P        (22)
#define YSTAT_AUS_P         (24)
#define YSTAT_AVS_P         (25)
#define YSTAT_AOS_P         (26)
#define YSTAT_AIS_P         (27)
#define YSTAT_MUS_P         (28)
#define YSTAT_MVS_P         (29)
#define YSTAT_MOS_P         (30)
#define YSTAT_MIS_P         (31)

/* Bit Masks */
#define YSTAT_AZ            MAKE_BITMASK_(YSTAT_AZ_P)
#define YSTAT_AN            MAKE_BITMASK_(YSTAT_AN_P)
#define YSTAT_AV            MAKE_BITMASK_(YSTAT_AV_P)
#define YSTAT_AC            MAKE_BITMASK_(YSTAT_AC_P)
#define YSTAT_MZ            MAKE_BITMASK_(YSTAT_MZ_P)
#define YSTAT_MN            MAKE_BITMASK_(YSTAT_MN_P)
#define YSTAT_MV            MAKE_BITMASK_(YSTAT_MV_P)
#define YSTAT_MU            MAKE_BITMASK_(YSTAT_MU_P)
#define YSTAT_SZ            MAKE_BITMASK_(YSTAT_SZ_P)
#define YSTAT_SN            MAKE_BITMASK_(YSTAT_SN_P)
#define YSTAT_BF            MAKE_BITMASK_(YSTAT_BF_P)
#define YSTAT_AI            MAKE_BITMASK_(YSTAT_AI_P)
#define YSTAT_MI            MAKE_BITMASK_(YSTAT_MI_P)
#define YSTAT_UEN           MAKE_BITMASK_(YSTAT_UEN_P)
#define YSTAT_OEN           MAKE_BITMASK_(YSTAT_OEN_P)
#define YSTAT_IVEN          MAKE_BITMASK_(YSTAT_IVEN_P)
#define YSTAT_AUS           MAKE_BITMASK_(YSTAT_AUS_P)
#define YSTAT_AVS           MAKE_BITMASK_(YSTAT_AVS_P)
#define YSTAT_AOS           MAKE_BITMASK_(YSTAT_AOS_P)
#define YSTAT_AIS           MAKE_BITMASK_(YSTAT_AIS_P)
#define YSTAT_MUS           MAKE_BITMASK_(YSTAT_MUS_P)
#define YSTAT_MVS           MAKE_BITMASK_(YSTAT_MVS_P)
#define YSTAT_MOS           MAKE_BITMASK_(YSTAT_MOS_P)
#define YSTAT_MIS           MAKE_BITMASK_(YSTAT_MIS_P)


/* ****************************************************************** */
/* ***************** Mapped Register Defines ************************ */
/* ****************************************************************** */

/* *********************** X Comp Block ***************************** */

#define XR0_LOC             (0x180000)
#define XR1_LOC             (0x180001)
#define XR2_LOC             (0x180002)
#define XR3_LOC             (0x180003)
#define XR4_LOC             (0x180004)
#define XR5_LOC             (0x180005)
#define XR6_LOC             (0x180006)
#define XR7_LOC             (0x180007)
#define XR8_LOC             (0x180008)
#define XR9_LOC             (0x180009)
#define XR10_LOC            (0x18000A)
#define XR11_LOC            (0x18000B)
#define XR12_LOC            (0x18000C)
#define XR13_LOC            (0x18000D)
#define XR14_LOC            (0x18000E)
#define XR15_LOC            (0x18000F)
#define XR16_LOC            (0x180010)
#define XR17_LOC            (0x180011)
#define XR18_LOC            (0x180012)
#define XR19_LOC            (0x180013)
#define XR20_LOC            (0x180014)
#define XR21_LOC            (0x180015)
#define XR22_LOC            (0x180016)
#define XR23_LOC            (0x180017)
#define XR24_LOC            (0x180018)
#define XR25_LOC            (0x180019)
#define XR26_LOC            (0x18001A)
#define XR27_LOC            (0x18001B)
#define XR28_LOC            (0x18001C)
#define XR29_LOC            (0x18001D)
#define XR30_LOC            (0x18001E)
#define XR31_LOC            (0x18001F)

/* *********************** Y Comp Block ***************************** */

#define YR0_LOC             (0x180040)
#define YR1_LOC             (0x180041)
#define YR2_LOC             (0x180042)
#define YR3_LOC             (0x180043)
#define YR4_LOC             (0x180044)
#define YR5_LOC             (0x180045)
#define YR6_LOC             (0x180046)
#define YR7_LOC             (0x180047)
#define YR8_LOC             (0x180048)
#define YR9_LOC             (0x180049)
#define YR10_LOC            (0x18004A)
#define YR11_LOC            (0x18004B)
#define YR12_LOC            (0x18004C)
#define YR13_LOC            (0x18004D)
#define YR14_LOC            (0x18004E)
#define YR15_LOC            (0x18004F)
#define YR16_LOC            (0x180050)
#define YR17_LOC            (0x180051)
#define YR18_LOC            (0x180052)
#define YR19_LOC            (0x180053)
#define YR20_LOC            (0x180054)
#define YR21_LOC            (0x180055)
#define YR22_LOC            (0x180056)
#define YR23_LOC            (0x180057)
#define YR24_LOC            (0x180058)
#define YR25_LOC            (0x180059)
#define YR26_LOC            (0x18005A)
#define YR27_LOC            (0x18005B)
#define YR28_LOC            (0x18005C)
#define YR29_LOC            (0x18005D)
#define YR30_LOC            (0x18005E)
#define YR31_LOC            (0x18005F)

/* ******************** XY Comp Block Merged ************************ */

#define XYR0_LOC            (0x180080)
#define XYR1_LOC            (0x180081)
#define XYR2_LOC            (0x180082)
#define XYR3_LOC            (0x180083)
#define XYR4_LOC            (0x180084)
#define XYR5_LOC            (0x180085)
#define XYR6_LOC            (0x180086)
#define XYR7_LOC            (0x180087)
#define XYR8_LOC            (0x180088)
#define XYR9_LOC            (0x180089)
#define XYR10_LOC           (0x18008A)
#define XYR11_LOC           (0x18008B)
#define XYR12_LOC           (0x18008C)
#define XYR13_LOC           (0x18008D)
#define XYR14_LOC           (0x18008E)
#define XYR15_LOC           (0x18008F)
#define XYR16_LOC           (0x180090)
#define XYR17_LOC           (0x180091)
#define XYR18_LOC           (0x180092)
#define XYR19_LOC           (0x180093)
#define XYR20_LOC           (0x180094)
#define XYR21_LOC           (0x180095)
#define XYR22_LOC           (0x180096)
#define XYR23_LOC           (0x180097)
#define XYR24_LOC           (0x180098)
#define XYR25_LOC           (0x180099)
#define XYR26_LOC           (0x18009A)
#define XYR27_LOC           (0x18009B)
#define XYR28_LOC           (0x18009C)
#define XYR29_LOC           (0x18009D)
#define XYR30_LOC           (0x18009E)
#define XYR31_LOC           (0x18009F)

/* ******************** YX Comp Block Merged ************************ */

#define YXR0_LOC            (0x1800C0)
#define YXR1_LOC            (0x1800C1)
#define YXR2_LOC            (0x1800C2)
#define YXR3_LOC            (0x1800C3)
#define YXR4_LOC            (0x1800C4)
#define YXR5_LOC            (0x1800C5)
#define YXR6_LOC            (0x1800C6)
#define YXR7_LOC            (0x1800C7)
#define YXR8_LOC            (0x1800C8)
#define YXR9_LOC            (0x1800C9)
#define YXR10_LOC           (0x1800CA)
#define YXR11_LOC           (0x1800CB)
#define YXR12_LOC           (0x1800CC)
#define YXR13_LOC           (0x1800CD)
#define YXR14_LOC           (0x1800CE)
#define YXR15_LOC           (0x1800CF)
#define YXR16_LOC           (0x1800D0)
#define YXR17_LOC           (0x1800D1)
#define YXR18_LOC           (0x1800D2)
#define YXR19_LOC           (0x1800D3)
#define YXR20_LOC           (0x1800D4)
#define YXR21_LOC           (0x1800D5)
#define YXR22_LOC           (0x1800D6)
#define YXR23_LOC           (0x1800D7)
#define YXR24_LOC           (0x1800D8)
#define YXR25_LOC           (0x1800D9)
#define YXR26_LOC           (0x1800DA)
#define YXR27_LOC           (0x1800DB)
#define YXR28_LOC           (0x1800DC)
#define YXR29_LOC           (0x1800DD)
#define YXR30_LOC           (0x1800DE)
#define YXR31_LOC           (0x1800DF)

/* ****************** XY Comp Block Broadcast *********************** */ 

#define XYBR0_LOC           (0x180100)
#define XYBR1_LOC           (0x180101)
#define XYBR2_LOC           (0x180102)
#define XYBR3_LOC           (0x180103)
#define XYBR4_LOC           (0x180104)
#define XYBR5_LOC           (0x180105)
#define XYBR6_LOC           (0x180106)
#define XYBR7_LOC           (0x180107)
#define XYBR8_LOC           (0x180108)
#define XYBR9_LOC           (0x180109)
#define XYBR10_LOC          (0x18010A)
#define XYBR11_LOC          (0x18010B)
#define XYBR12_LOC          (0x18010C)
#define XYBR13_LOC          (0x18010D)
#define XYBR14_LOC          (0x18010E)
#define XYBR15_LOC          (0x18010F)
#define XYBR16_LOC          (0x180110)
#define XYBR17_LOC          (0x180111)
#define XYBR18_LOC          (0x180112)
#define XYBR19_LOC          (0x180113)
#define XYBR20_LOC          (0x180114)
#define XYBR21_LOC          (0x180115)
#define XYBR22_LOC          (0x180116)
#define XYBR23_LOC          (0x180117)
#define XYBR24_LOC          (0x180118)
#define XYBR25_LOC          (0x180119)
#define XYBR26_LOC          (0x18011A)
#define XYBR27_LOC          (0x18011B)
#define XYBR28_LOC          (0x18011C)
#define XYBR29_LOC          (0x18011D)
#define XYBR30_LOC          (0x18011E)
#define XYBR31_LOC          (0x18011F)

/* *************************** JALU ********************************* */

#define J0_LOC              (0x180180)
#define J1_LOC              (0x180181)
#define J2_LOC              (0x180182)
#define J3_LOC              (0x180183)
#define J4_LOC              (0x180184)
#define J5_LOC              (0x180185)
#define J6_LOC              (0x180186)
#define J7_LOC              (0x180187)
#define J8_LOC              (0x180188)
#define J9_LOC              (0x180189)
#define J10_LOC             (0x18018A)
#define J11_LOC             (0x18018B)
#define J12_LOC             (0x18018C)
#define J13_LOC             (0x18018D)
#define J14_LOC             (0x18018E)
#define J15_LOC             (0x18018F)
#define J16_LOC             (0x180190)
#define J17_LOC             (0x180191)
#define J18_LOC             (0x180192)
#define J19_LOC             (0x180193)
#define J20_LOC             (0x180194)
#define J21_LOC             (0x180195)
#define J22_LOC             (0x180196)
#define J23_LOC             (0x180197)
#define J24_LOC             (0x180198)
#define J25_LOC             (0x180199)
#define J26_LOC             (0x18019A)
#define J27_LOC             (0x18019B)
#define J28_LOC             (0x18019C)
#define J29_LOC             (0x18019D)
#define J30_LOC             (0x18019E)
#define J31_LOC             (0x18019F)

/* *************************** KALU ********************************* */

#define K0_LOC              (0x1801A0)
#define K1_LOC              (0x1801A1)
#define K2_LOC              (0x1801A2)
#define K3_LOC              (0x1801A3)
#define K4_LOC              (0x1801A4)
#define K5_LOC              (0x1801A5)
#define K6_LOC              (0x1801A6)
#define K7_LOC              (0x1801A7)
#define K8_LOC              (0x1801A8)
#define K9_LOC              (0x1801A9)
#define K10_LOC             (0x1801AA)
#define K11_LOC             (0x1801AB)
#define K12_LOC             (0x1801AC)
#define K13_LOC             (0x1801AD)
#define K14_LOC             (0x1801AE)
#define K15_LOC             (0x1801AF)
#define K16_LOC             (0x1801B0)
#define K17_LOC             (0x1801B1)
#define K18_LOC             (0x1801B2)
#define K19_LOC             (0x1801B3)
#define K20_LOC             (0x1801B4)
#define K21_LOC             (0x1801B5)
#define K22_LOC             (0x1801B6)
#define K23_LOC             (0x1801B7)
#define K24_LOC             (0x1801B8)
#define K25_LOC             (0x1801B9)
#define K26_LOC             (0x1801BA)
#define K27_LOC             (0x1801BB)
#define K28_LOC             (0x1801BC)
#define K29_LOC             (0x1801BD)
#define K30_LOC             (0x1801BE)
#define K31_LOC             (0x1801BF)

/* ******************** JALU Circular ******************************* */

#define JB0_LOC             (0x1801C0)
#define JB1_LOC             (0x1801C1)
#define JB2_LOC             (0x1801C2)
#define JB3_LOC             (0x1801C3)
#define JL0_LOC             (0x1801C4)
#define JL1_LOC             (0x1801C5)
#define JL2_LOC             (0x1801C6)
#define JL3_LOC             (0x1801C7)

/* ******************** KALU Circular ******************************* */ 

#define KB0_LOC             (0x1801E0)
#define KB1_LOC             (0x1801E1)
#define KB2_LOC             (0x1801E2)
#define KB3_LOC             (0x1801E3)
#define KL0_LOC             (0x1801E4)
#define KL1_LOC             (0x1801E5)
#define KL2_LOC             (0x1801E6)
#define KL3_LOC             (0x1801E7)

/* ******************* Sequencer Registers ************************** */

#define CJMP_LOC            (0x180340)
#define RETI_LOC            (0x180342)
#define RETS_LOC            (0x180344)
#define DBGE_LOC            (0x180345)
/* Should not be used due to silicon anomaly */
/* #define ILATSTL_LOC         (0x180346)    */ 
/* #define ILATSTH_LOC         (0x180347)    */
#define LC0_LOC             (0x180348)
#define LC1_LOC             (0x180349)

/* ****************** ILAT and IMASK with bit defines *************** */ 

#define ILATL_LOC           (0x18034A)          /* Use ILAT registers 
                                                 * for reads only
                                                 */
#define ILATH_LOC           (0x18034B)
#define IMASKL_LOC	    (0x18034C)
#define	IMASKH_LOC          (0x18034D)
#define PMASKL_LOC          (0x18034E)
#define	PMASKH_LOC          (0x18034F)

/* Bit positions */
#define INT_RES0_P          (0 )
#define INT_RES1_P          (1 )
#define INT_TIMER0L_P       (2 )
#define INT_TIMER1L_P       (3 )
#define INT_RES4_P          (4 )
#define INT_RES5_P          (5 )
#define INT_LINK0_P         (6 )
#define INT_LINK1_P         (7 )
#define INT_LINK2_P         (8 )
#define INT_LINK3_P         (9 )
#define INT_RES_10_P        (10)
#define INT_RES_11_P        (11)
#define INT_RES_12_P        (12)
#define INT_RES_13_P        (13)
#define INT_DMA0_P          (14)
#define INT_DMA1_P          (15)
#define INT_DMA2_P          (16)
#define INT_DMA3_P          (17)
#define INT_RES18_P         (18)
#define INT_RES19_P         (19)
#define INT_RES20_P         (20)
#define INT_RES21_P         (21)
#define INT_DMA4_P          (22)
#define INT_DMA5_P          (23)
#define INT_DMA6_P          (24)
#define INT_DMA7_P          (25)
#define INT_RES26_P         (26)
#define INT_RES27_P         (27)
#define INT_RES28_P         (28)
#define INT_DMA8_P          (29)
#define INT_DMA9_P          (30)
#define INT_DMA10_P         (31)
#define INT_DMA11_P         (0 )
#define INT_RES33_P         (1 )
#define INT_RES34_P         (2 )
#define INT_RES35_P         (3 )
#define INT_RES36_P         (4 )
#define INT_DMA12_P         (5 )
#define INT_DMA13_P         (6 )
#define INT_RES39_P         (7 )
#define INT_RES40_P         (8 )
#define INT_IRQ0_P          (9 )
#define INT_IRQ1_P          (10)
#define INT_IRQ2_P          (11)
#define INT_IRQ3_P          (12)
#define INT_RES45_P         (13)
#define INT_RES46_P         (14)
#define INT_RES47_P         (15)
#define INT_VIRPT_P         (16)
#define INT_RES49_P         (17)
#define INT_BUSLOCK_P       (18)
#define INT_RES51_P         (19)
#define INT_TIMER0H_P       (20)
#define INT_TIMER1H_P       (21)
#define INT_RES54_P         (22)
#define INT_RES55_P         (23)
#define INT_RES56_P         (24)
#define INT_HWERR_P         (25)
#define INT_RES58_P         (26)
#define INT_RES59_P         (27)
#define INT_GIE_P           (28)
#define INT_RES61_P         (29)
#define INT_EXCEPT_P        (30)            /* !!! Need to choose one 
                                             * or the other !!!
                                             */
#define INT_SW_P            (30)
#define INT_EMUL_P          (31)

/* Bit Masks for C only */
#define INT_RES0_64         MAKE_LL_BITMASK_(INT_RES0_P    + 0 )
#define INT_RES1_64         MAKE_LL_BITMASK_(INT_RES1_P    + 0 )
#define INT_TIMER0L_64      MAKE_LL_BITMASK_(INT_TIMER0L_P + 0 )
#define INT_TIMER1L_64      MAKE_LL_BITMASK_(INT_TIMER1L_P + 0 )
#define INT_RES4_64         MAKE_LL_BITMASK_(INT_RES4_P    + 0 )
#define INT_RES5_64         MAKE_LL_BITMASK_(INT_RES5_P    + 0 )
#define INT_LINK0_64        MAKE_LL_BITMASK_(INT_LINK0_P   + 0 )
#define INT_LINK1_64        MAKE_LL_BITMASK_(INT_LINK1_P   + 0 )
#define INT_LINK2_64        MAKE_LL_BITMASK_(INT_LINK2_P   + 0 )
#define INT_LINK3_64        MAKE_LL_BITMASK_(INT_LINK3_P   + 0 )
#define INT_RES_10_64       MAKE_LL_BITMASK_(INT_RES_10_P  + 0 )
#define INT_RES_11_64       MAKE_LL_BITMASK_(INT_RES_11_P  + 0 )
#define INT_RES_12_64       MAKE_LL_BITMASK_(INT_RES_12_P  + 0 )
#define INT_RES_13_64       MAKE_LL_BITMASK_(INT_RES_13_P  + 0 )
#define INT_DMA0_64         MAKE_LL_BITMASK_(INT_DMA0_P    + 0 )
#define INT_DMA1_64         MAKE_LL_BITMASK_(INT_DMA1_P    + 0 )
#define INT_DMA2_64         MAKE_LL_BITMASK_(INT_DMA2_P    + 0 )
#define INT_DMA3_64         MAKE_LL_BITMASK_(INT_DMA3_P    + 0 )
#define INT_RES18_64        MAKE_LL_BITMASK_(INT_RES18_P   + 0 )
#define INT_RES19_64        MAKE_LL_BITMASK_(INT_RES19_P   + 0 )
#define INT_RES20_64        MAKE_LL_BITMASK_(INT_RES20_P   + 0 )
#define INT_RES21_64        MAKE_LL_BITMASK_(INT_RES21_P   + 0 )
#define INT_DMA4_64         MAKE_LL_BITMASK_(INT_DMA4_P    + 0 )
#define INT_DMA5_64         MAKE_LL_BITMASK_(INT_DMA5_P    + 0 )
#define INT_DMA6_64         MAKE_LL_BITMASK_(INT_DMA6_P    + 0 )
#define INT_DMA7_64         MAKE_LL_BITMASK_(INT_DMA7_P    + 0 )
#define INT_RES26_64        MAKE_LL_BITMASK_(INT_RES26_P   + 0 )
#define INT_RES27_64        MAKE_LL_BITMASK_(INT_RES27_P   + 0 )
#define INT_RES28_64        MAKE_LL_BITMASK_(INT_RES28_P   + 0 )
#define INT_DMA8_64         MAKE_LL_BITMASK_(INT_DMA8_P    + 0 )
#define INT_DMA9_64         MAKE_LL_BITMASK_(INT_DMA9_P    + 0 )
#define INT_DMA10_64        MAKE_LL_BITMASK_(INT_DMA10_P   + 0 )
#define INT_DMA11_64        MAKE_LL_BITMASK_(INT_DMA11_P   + 32)
#define INT_RES33_64        MAKE_LL_BITMASK_(INT_RES33_P   + 32)
#define INT_RES34_64        MAKE_LL_BITMASK_(INT_RES34_P   + 32)
#define INT_RES35_64        MAKE_LL_BITMASK_(INT_RES35_P   + 32)
#define INT_RES36_64        MAKE_LL_BITMASK_(INT_RES36_P   + 32)
#define INT_DMA12_64        MAKE_LL_BITMASK_(INT_DMA12_P   + 32)
#define INT_DMA13_64        MAKE_LL_BITMASK_(INT_DMA13_P   + 32)
#define INT_RES39_64        MAKE_LL_BITMASK_(INT_RES39_P   + 32)
#define INT_RES40_64        MAKE_LL_BITMASK_(INT_RES40_P   + 32)
#define INT_IRQ0_64         MAKE_LL_BITMASK_(INT_IRQ0_P    + 32)
#define INT_IRQ1_64         MAKE_LL_BITMASK_(INT_IRQ1_P    + 32)
#define INT_IRQ2_64         MAKE_LL_BITMASK_(INT_IRQ2_P    + 32)
#define INT_IRQ3_64         MAKE_LL_BITMASK_(INT_IRQ3_P    + 32)
#define INT_RES45_64        MAKE_LL_BITMASK_(INT_RES45_P   + 32)
#define INT_RES46_64        MAKE_LL_BITMASK_(INT_RES46_P   + 32)
#define INT_RES47_64        MAKE_LL_BITMASK_(INT_RES47_P   + 32)
#define INT_VIRPT_64        MAKE_LL_BITMASK_(INT_VIRPT_P   + 32)
#define INT_RES49_64        MAKE_LL_BITMASK_(INT_RES49_P   + 32)
#define INT_BUSLOCK_64      MAKE_LL_BITMASK_(INT_BUSLOCK_P + 32)
#define INT_RES51_64        MAKE_LL_BITMASK_(INT_RES51_P   + 32)
#define INT_TIMER0H_64      MAKE_LL_BITMASK_(INT_TIMER0H_P + 32)
#define INT_TIMER1H_64      MAKE_LL_BITMASK_(INT_TIMER1H_P + 32)
#define INT_RES54_64        MAKE_LL_BITMASK_(INT_RES54_P   + 32)
#define INT_RES55_64        MAKE_LL_BITMASK_(INT_RES55_P   + 32)
#define INT_RES56_64        MAKE_LL_BITMASK_(INT_RES56_P   + 32)
#define INT_HWERR_64        MAKE_LL_BITMASK_(INT_HWERR_P   + 32)
#define INT_RES58_64        MAKE_LL_BITMASK_(INT_RES58_P   + 32)
#define INT_RES59_64        MAKE_LL_BITMASK_(INT_RES59_P   + 32)
#define INT_RES60_64        MAKE_LL_BITMASK_(INT_RES60_P   + 32)
#define INT_RES61_64        MAKE_LL_BITMASK_(INT_RES61_P   + 32)
#define INT_EXCEPT_64       MAKE_LL_BITMASK_(INT_EXCEPT_P  + 32)
#define INT_EMUL_64         MAKE_LL_BITMASK_(INT_EMUL_P    + 32)

/* Bit Masks */
#define INT_RES0            MAKE_BITMASK_(INT_RES0_P   )
#define INT_RES1            MAKE_BITMASK_(INT_RES1_P   )
#define INT_TIMER0L         MAKE_BITMASK_(INT_TIMER0L_P)
#define INT_TIMER1L         MAKE_BITMASK_(INT_TIMER1L_P)
#define INT_RES4            MAKE_BITMASK_(INT_RES4_P   )
#define INT_RES5            MAKE_BITMASK_(INT_RES5_P   )
#define INT_LINK0           MAKE_BITMASK_(INT_LINK0_P  )
#define INT_LINK1           MAKE_BITMASK_(INT_LINK1_P  )
#define INT_LINK2           MAKE_BITMASK_(INT_LINK2_P  )
#define INT_LINK3           MAKE_BITMASK_(INT_LINK3_P  )
#define INT_RES_10          MAKE_BITMASK_(INT_RES_10_P )
#define INT_RES_11          MAKE_BITMASK_(INT_RES_11_P )
#define INT_RES_12          MAKE_BITMASK_(INT_RES_12_P )
#define INT_RES_13          MAKE_BITMASK_(INT_RES_13_P )
#define INT_DMA0            MAKE_BITMASK_(INT_DMA0_P   )
#define INT_DMA1            MAKE_BITMASK_(INT_DMA1_P   )
#define INT_DMA2            MAKE_BITMASK_(INT_DMA2_P   )
#define INT_DMA3            MAKE_BITMASK_(INT_DMA3_P   )
#define INT_RES18           MAKE_BITMASK_(INT_RES18_P  )
#define INT_RES19           MAKE_BITMASK_(INT_RES19_P  )
#define INT_RES20           MAKE_BITMASK_(INT_RES20_P  )
#define INT_RES21           MAKE_BITMASK_(INT_RES21_P  )
#define INT_DMA4            MAKE_BITMASK_(INT_DMA4_P   )
#define INT_DMA5            MAKE_BITMASK_(INT_DMA5_P   )
#define INT_DMA6            MAKE_BITMASK_(INT_DMA6_P   )
#define INT_DMA7            MAKE_BITMASK_(INT_DMA7_P   )
#define INT_RES26           MAKE_BITMASK_(INT_RES26_P  )
#define INT_RES27           MAKE_BITMASK_(INT_RES27_P  )
#define INT_RES28           MAKE_BITMASK_(INT_RES28_P  )
#define INT_DMA8            MAKE_BITMASK_(INT_DMA8_P   )
#define INT_DMA9            MAKE_BITMASK_(INT_DMA9_P   )
#define INT_DMA10           MAKE_BITMASK_(INT_DMA10_P  )
#define INT_DMA11           MAKE_BITMASK_(INT_DMA11_P  )
#define INT_RES33           MAKE_BITMASK_(INT_RES33_P  )
#define INT_RES34           MAKE_BITMASK_(INT_RES34_P  )
#define INT_RES35           MAKE_BITMASK_(INT_RES35_P  )
#define INT_RES36           MAKE_BITMASK_(INT_RES36_P  )
#define INT_DMA12           MAKE_BITMASK_(INT_DMA12_P  )
#define INT_DMA13           MAKE_BITMASK_(INT_DMA13_P  )
#define INT_RES39           MAKE_BITMASK_(INT_RES39_P  )
#define INT_RES40           MAKE_BITMASK_(INT_RES40_P  )
#define INT_IRQ0            MAKE_BITMASK_(INT_IRQ0_P   )
#define INT_IRQ1            MAKE_BITMASK_(INT_IRQ1_P   )
#define INT_IRQ2            MAKE_BITMASK_(INT_IRQ2_P   )
#define INT_IRQ3            MAKE_BITMASK_(INT_IRQ3_P   )
#define INT_RES45           MAKE_BITMASK_(INT_RES45_P  )
#define INT_RES46           MAKE_BITMASK_(INT_RES46_P  )
#define INT_RES47           MAKE_BITMASK_(INT_RES47_P  )
#define INT_VIRPT           MAKE_BITMASK_(INT_VIRPT_P  )
#define INT_RES49           MAKE_BITMASK_(INT_RES49_P  )
#define INT_BUSLOCK         MAKE_BITMASK_(INT_BUSLOCK_P)
#define INT_RES51           MAKE_BITMASK_(INT_RES51_P  )
#define INT_TIMER0H         MAKE_BITMASK_(INT_TIMER0H_P)
#define INT_TIMER1H         MAKE_BITMASK_(INT_TIMER1H_P)
#define INT_RES54           MAKE_BITMASK_(INT_RES54_P  )
#define INT_RES55           MAKE_BITMASK_(INT_RES55_P  )
#define INT_RES56           MAKE_BITMASK_(INT_RES56_P  )
#define INT_HWERR           MAKE_BITMASK_(INT_HWERR_P  )
#define INT_RES58           MAKE_BITMASK_(INT_RES58_P  )
#define INT_RES59           MAKE_BITMASK_(INT_RES59_P  )
#define INT_GIE             MAKE_BITMASK_(INT_GIE_P    )
#define INT_RES61           MAKE_BITMASK_(INT_RES61_P  )
#define INT_SW              MAKE_BITMASK_(INT_SW_P     )    /* !!! Need to 
                                                             * choose !!!
                                                             */
#define INT_EXCEPT          MAKE_BITMASK_(INT_EXCEPT_P )
#define INT_EMUL            MAKE_BITMASK_(INT_EMUL_P   )

/* ****************************************************************** */

#define TIMER0L_LOC         (0x180350)
#define	TIMER0H_LOC         (0x180351)
#define TIMER1L_LOC         (0x180352)
#define	TIMER1H_LOC         (0x180353)
#define TMRIN0L_LOC         (0x180354)
#define	TMRIN0H_LOC         (0x180355)
#define TMRIN1L_LOC         (0x180356)
#define	TMRIN1H_LOC         (0x180357)

/* ******************* SQCTL With Bit Defines *********************** */
#define SQCTL_LOC           (0x180358)
#define SQCTLST_LOC         (0x180359)
#define SQCTLCL_LOC         (0x18035A)

/* Bit positions */
#define SQCTL_BTBEN_P       (0)
#define SQCTL_BTBLK_P       (1)
#define SQCTL_SWRST_P       (5)
#define SQCTL_DBGEN_P       (8)
#define SQCTL_NMOD_P        (9)
#define SQCTL_TMR0RN_P      (12)
#define SQCTL_TMR1RN_P      (13)
#define SQCTL_IRQ0_EDGE_P   (16)
#define SQCTL_IRQ1_EDGE_P   (17)
#define SQCTL_IRQ2_EDGE_P   (18)
#define SQCTL_IRQ3_EDGE_P   (19)
#define SQCTL_FLAG0_EN_P    (20)  /* FLAG0 output enable is bit 20 in SQCTL */
#define SQCTL_FLAG1_EN_P    (21)  /* FLAG1 output enable is bit 21 in SQCTL */
#define SQCTL_FLAG2_EN_P    (22)  /* FLAG2 output enable is bit 22 in SQCTL */
#define SQCTL_FLAG3_EN_P    (23)  /* FLAG3 output enable is bit 23 in SQCTL */
#define SQCTL_FLAG0_OUT_P   (24)  /* FLAG0 out pin is bit 24 in SQCTL       */
#define SQCTL_FLAG1_OUT_P   (25)  /* FLAG1 out pin is bit 25 in SQCTL       */
#define SQCTL_FLAG2_OUT_P   (26)  /* FLAG2 out pin is bit 26 in SQCTL       */
#define SQCTL_FLAG3_OUT_P   (27)  /* FLAG3 out pin is bit 27 in SQCTL       */

/* Bit Masks */
#define SQCTL_BTBEN         MAKE_BITMASK_(SQCTL_BTBEN_P)
#define SQCTL_BTBLK         MAKE_BITMASK_(SQCTL_BTBLK_P)
#define SQCTL_SWRST         MAKE_BITMASK_(SQCTL_SWRST_P)
#define SQCTL_DBGEN         MAKE_BITMASK_(SQCTL_DBGEN_P)
#define SQCTL_NMOD          MAKE_BITMASK_(SQCTL_NMOD_P)
#define SQCTL_TMR0RN        MAKE_BITMASK_(SQCTL_TMR0RN_P)
#define SQCTL_TMR1RN        MAKE_BITMASK_(SQCTL_TMR1RN_P)
#define SQCTL_IRQ0_EDGE     MAKE_BITMASK_(SQCTL_IRQ0_EDGE_P)
#define SQCTL_IRQ1_EDGE     MAKE_BITMASK_(SQCTL_IRQ1_EDGE_P)
#define SQCTL_IRQ2_EDGE     MAKE_BITMASK_(SQCTL_IRQ2_EDGE_P)
#define SQCTL_IRQ3_EDGE     MAKE_BITMASK_(SQCTL_IRQ3_EDGE_P)
#define SQCTL_FLAG0_EN      MAKE_BITMASK_(SQCTL_FLAG0_EN_P)						
#define SQCTL_FLAG1_EN      MAKE_BITMASK_(SQCTL_FLAG1_EN_P)
#define SQCTL_FLAG2_EN      MAKE_BITMASK_(SQCTL_FLAG2_EN_P)					
#define SQCTL_FLAG3_EN      MAKE_BITMASK_(SQCTL_FLAG3_EN_P)					
#define SQCTL_FLAG0_OUT     MAKE_BITMASK_(SQCTL_FLAG0_OUT_P)					
#define SQCTL_FLAG1_OUT     MAKE_BITMASK_(SQCTL_FLAG1_OUT_P)					
#define SQCTL_FLAG2_OUT     MAKE_BITMASK_(SQCTL_FLAG2_OUT_P)					
#define SQCTL_FLAG3_OUT     MAKE_BITMASK_(SQCTL_FLAG3_OUT_P)

/* ******************* SQSTAT With Bit Defines ********************** */

#define SQSTAT_LOC	        (0x18035B)

/* Bit positions (of the masks) */
#define SQSTAT_MODE_P       (0)
#define SQSTAT_IDLE_P       (2)
#define SQSTAT_SPVCMD_P     (3)
#define SQSTAT_EXCAUSE_P    (8)
#define SQSTAT_EMCAUSE_P    (12)
#define SQSTAT_FLG_P        (16)

/* Bit masks */
#define SQSTAT_MODE         (0x00000003)
#define SQSTAT_IDLE         (0x00000004)
#define SQSTAT_SPVCMD       (0x000000F8)
#define SQSTAT_EXCAUSE      (0x00000F00)
#define SQSTAT_EMCAUSE      (0x0000F000)
#define SQSTAT_FLG          (0x000F0000)

/* ******************* SFREG With Bit Defines *********************** */

#define SFREG_LOC	        (0x18035C)

/* Bit positions */
#define SFREG_GSCF0_P		(0)
#define SFREG_GSCF1_P		(1)
#define SFREG_XSCF0_P		(2)
#define SFREG_XSCF1_P		(3)
#define SFREG_YSCF0_P		(4)
#define SFREG_YSCF1_P		(5)

/* Bit Masks */
#define SFREG_GSCF0			MAKE_BITMASK_(SFREG_GSCF0_P   )
#define SFREG_GSCF1			MAKE_BITMASK_(SFREG_GSCF1_P   )
#define SFREG_XSCF0			MAKE_BITMASK_(SFREG_XSCF0_P   )
#define SFREG_XSCF1			MAKE_BITMASK_(SFREG_XSCF1_P   )
#define SFREG_YSCF0			MAKE_BITMASK_(SFREG_YSCF0_P   )
#define SFREG_YSCF1			MAKE_BITMASK_(SFREG_YSCF1_P   )

/* ****************************************************************** */

/* Should not be used due to silicon anomaly */
/* #define ILATCLL_LOC         (0x18035E)    */
/* #define ILATCLH_LOC         (0x18035F)    */ 
                                             

/* ******************* Emulation Registers ************************** */

#define	EMUCTL_LOC          (0x180360)

/* Bit positions */
#define EMUCTL_EMEN_P       (0)
#define EMUCTL_TEME_P       (1)
#define EMUCTL_EMUOE_P      (2)
#define EMUCTL_SPFDIS_P     (3)

/* Bit Masks */
#define EMUCTL_EMEN         MAKE_BITMASK_(EMUCTL_EMEN_P)						
#define EMUCTL_TEME         MAKE_BITMASK_(EMUCTL_TEME_P)
#define EMUCTL_EMUOE        MAKE_BITMASK_(EMUCTL_EMUOE_P)
#define EMUCTL_SPFDIS       MAKE_BITMASK_(EMUCTL_SPFDIS_P)

#define	EMUSTAT_LOC         (0x180361)

/* Bit positions */
#define EMUSTAT_EMUMOD_P    (0)
#define EMUSTAT_IRFREE_P    (1)

/* Bit Masks */
#define EMUSTAT_EMUMOD      MAKE_BITMASK_(EMUSTAT_EMUMOD_P)						
#define EMUSTAT_IRFREE      MAKE_BITMASK_(EMUSTAT_IRFREE_P)

#define	PRFM_LOC            (0x180363)

/* Bit Masks */
/* Non Granted Requests */
#define PRFM_NGR_SEQ        (0)
#define PRFM_NGR_JALU       (1)
#define PRFM_NGR_KALU       (2)
#define PRFM_NGR_DMAI       (3)
#define PRFM_NGR_DMAE       (4)
#define PRFM_NGR_BIU        (5)

/* Granted Requests */
#define PRFM_GR_SEQ         (6)
#define PRFM_GR_JALU        (7)
#define PRFM_GR_KALU        (8)
#define PRFM_GR_DMAI        (9)
#define PRFM_GR_DMAE        (10)
#define PRFM_GR_BIU         (11)

/* Bus 0 */
#define PRFM_BUS0_NORM      (12)
#define PRFM_BUS0_LONG      (13)
#define PRFM_BUS0_QUAD      (14)

/* Bus 1 */
#define PRFM_BUS1_NORM      (15)
#define PRFM_BUS1_LONG      (16)
#define PRFM_BUS1_QUAD      (17)

/* Bus 2 */
#define PRFM_BUS2_NORM      (18)
#define PRFM_BUS2_LONG      (19)
#define PRFM_BUS2_QUAD      (20)

/* Module Used */
#define PRFM_MODULE_JALU    (21)
#define PRFM_MODULE_KALU    (22)
#define PRFM_MODULE_CBX     (23)
#define PRFM_MODULE_CBY     (24)
#define PRFM_MODULE_CTRL    (25)

#define PRFM_VBT            (26)
#define PRFM_SCYCLE         (27)
#define PRFM_BTBPR          (28)
#define PRFM_ISL            (29)
#define PRFM_CCYCLE         (30)
#define PRFM_SUMEN          (31)


#define	CCNT0_LOC           (0x180364)
#define	CCNT1_LOC           (0x180365)
#define	PRFCNT_LOC          (0x180366)
#define	EMUDAT_LOC          (0x180368)
#define	EMUIR_LOC           (0x18036C)
#define	TRCBMASK_LOC        (0x180370)
#define	TRCBPTR_LOC         (0x180378)
#define	IDCODE_LOC          (0x18037A)

/* ******************* TCBs With Bit Defines ************************ */

#define	DCS0_LOC            (0x180400)
#define	DCD0_LOC            (0x180404)
#define	DCS1_LOC            (0x180408)
#define	DCD1_LOC            (0x18040c)
#define	DCS2_LOC            (0x180410)
#define	DCD2_LOC            (0x180414)
#define	DCS3_LOC            (0x180418)
#define	DCD3_LOC            (0x18041C)
#define	DC4_LOC             (0x180420)
#define	DC5_LOC             (0x180424)
#define	DC6_LOC             (0x180428)
#define	DC7_LOC             (0x18042C)
#define	DC8_LOC             (0x180440)
#define	DC9_LOC             (0x180444)
#define	DC10_LOC            (0x180448)
#define	DC11_LOC            (0x18044C)
#define	DC12_LOC            (0x180458)
#define	DC13_LOC            (0x18045C)

/* TYPES */
#define TCB_EPROM           (0xC0000000)
#define TCB_FLYBY           (0xA0000000)
#define TCB_EXTMEM          (0x80000000)
#define TCB_INTMEM          (0x40000000)
#define TCB_LINK            (0x20000000)
#define TCB_DISABLE         (0x00000000)
/* PRIORITY */
#define TCB_HPRIORITY       (0x10000000)
/* 2D */
#define TCB_TWODIM          (0x08000000)
/* GRANULARITY */
#define TCB_QUAD            (0x06000000)
#define TCB_LONG            (0x04000000)
#define TCB_NORMAL          (0x02000000)
/* INTERRUPT */
#define TCB_INT             (0x01000000)
/* DMA REQUEST */
#define TCB_DMAR            (0x00800000)
/* CHAINING */
#define TCB_CHAIN           (0x00400000)
/* CHAINED CHANNEL */
#define TCB_DMA13DEST       (0x002E0000)
#define TCB_DMA12DEST       (0x002C0000)
#define TCB_DMA11DEST       (0x00260000)
#define TCB_DMA10DEST       (0x00240000)
#define TCB_DMA9DEST        (0x00220000)
#define TCB_DMA8DEST        (0x00200000)
#define TCB_DMA7DEST        (0x00160000)
#define TCB_DMA6DEST        (0x00140000)
#define TCB_DMA5DEST        (0x00120000)
#define TCB_DMA4DEST        (0x00100000)
#define TCB_DMA3DEST        (0x000E0000)
#define TCB_DMA3SOURCE      (0x000C0000)
#define TCB_DMA2DEST        (0x000A0000)
#define TCB_DMA2SOURCE      (0x00080000)
#define TCB_DMA1DEST        (0x00060000)
#define TCB_DMA1SOURCE      (0x00040000)
#define TCB_DMA0DEST        (0x00020000)
#define TCB_DMA0SOURCE      (0x00000000)
/* MS FOR CHAIN POINTER */
#define TCB_CHAINPTRM2      (0x00010000)
#define TCB_CHAINPTRM1      (0x00008000)
#define TCB_CHAINPTRM0      (0x00000000)

/* ******************* DMA Controls With Bit Defines **************** */
#define	DCNT_LOC            (0x180460)
#define	DCNTST_LOC          (0x180464)
#define	DCNTCL_LOC          (0x180468)

/* Bit positions */
#define DCNT_DMA0_P         (0)
#define DCNT_DMA1_P         (1)
#define DCNT_DMA2_P         (2)
#define DCNT_DMA3_P         (3)
#define DCNT_DMA4_P         (4)
#define DCNT_DMA5_P         (5)
#define DCNT_DMA6_P         (6)
#define DCNT_DMA7_P         (7)
#define DCNT_DMA8_P         (10)
#define DCNT_DMA9_P         (11)
#define DCNT_DMA10_P        (12)
#define DCNT_DMA11_P        (13)
#define DCNT_DMA12_P        (16)
#define DCNT_DMA13_P        (17)

/* Bit Masks */
#define DCNT_DMA0           MAKE_BITMASK_(DCNT_DMA0_P)
#define DCNT_DMA1           MAKE_BITMASK_(DCNT_DMA1_P)
#define DCNT_DMA2           MAKE_BITMASK_(DCNT_DMA2_P)
#define DCNT_DMA3           MAKE_BITMASK_(DCNT_DMA3_P)
#define DCNT_DMA4           MAKE_BITMASK_(DCNT_DMA4_P)
#define DCNT_DMA5           MAKE_BITMASK_(DCNT_DMA5_P)
#define DCNT_DMA6           MAKE_BITMASK_(DCNT_DMA6_P)
#define DCNT_DMA7           MAKE_BITMASK_(DCNT_DMA7_P)
#define DCNT_DMA8           MAKE_BITMASK_(DCNT_DMA8_P)
#define DCNT_DMA9           MAKE_BITMASK_(DCNT_DMA9_P)
#define DCNT_DMA10          MAKE_BITMASK_(DCNT_DMA10_P)
#define DCNT_DMA11          MAKE_BITMASK_(DCNT_DMA11_P)
#define DCNT_DMA12          MAKE_BITMASK_(DCNT_DMA12_P)
#define DCNT_DMA13          MAKE_BITMASK_(DCNT_DMA13_P)

/* ******************* DMA Status With Bit Defines ****************** */
#define	DSTATL_LOC          (0x18046C)
#define	DSTATCL_LOC         (0x180470)

/* Bit Masks */
#define DSTAT_IDLE          (0x00000000)
#define DSTAT_ACT           (0x00000001)
#define DSTAT_DONE          (0x00000002)
#define DSTAT_ACT_ERR       (0x00000004)
#define DSTAT_CFG_ERR       (0x00000005)
#define DSTAT_ADD_ERR       (0x00000007)

/* Field Extracts - use with fext instruction */
#define DSTATL0             (0x0003)       /*  0th position of length 3 */
#define DSTATL1             (0x0303)       /*  3rd position of length 3 */
#define DSTATL2             (0x0603)       /*  6th position of length 3 */
#define DSTATL3             (0x0903)       /*  9th position of length 3 */
#define DSTATL4             (0x0C03)       /* 12th position of length 3 */
#define DSTATL5             (0x0F03)       /* 15th position of length 3 */
#define DSTATL6             (0x1203)       /* 18th position of length 3 */
#define DSTATL7             (0x1503)       /* 21st position of length 3 */

#define	DSTATH_LOC          (0x18046D)
#define	DSTATCH_LOC         (0x180471)

#define DSTATH8             (0x0003)       /*  0th position of length 3 */
#define DSTATH9             (0x0303)       /*  3rd position of length 3 */
#define DSTATH10            (0x0603)       /*  6th position of length 3 */
#define DSTATH11            (0x0903)       /*  9th position of length 3 */
#define DSTATH12            (0x1203)       /* 18th position of length 3 */
#define DSTATH13            (0x1503)       /* 21st position of length 3 */

/* ************** SYSCON register With Bit Masks ******************** */
#define	SYSCON_LOC		    (0x180480)

/* Bit Masks */
#define SYSCON_MS0_IDLE     (0x00000001)
#define SYSCON_MS0_WT0      (0x00000000)
#define SYSCON_MS0_WT1      (0x00000002)
#define SYSCON_MS0_WT2      (0x00000004)
#define SYSCON_MS0_WT3      (0x00000006)
#define SYSCON_MS0_PIPE1    (0x00000000)
#define SYSCON_MS0_PIPE2    (0x00000008)
#define SYSCON_MS0_PIPE3    (0x00000010)
#define SYSCON_MS0_PIPE4    (0x00000018)
#define SYSCON_MS0_SLOW     (0x00000020)
#define SYSCON_MS1_IDLE     (SYSCON_MS0_IDLE << 6)
#define SYSCON_MS1_WT0      (SYSCON_MS0_WT0 << 6)
#define SYSCON_MS1_WT1      (SYSCON_MS0_WT1 << 6)
#define SYSCON_MS1_WT2      (SYSCON_MS0_WT2 << 6)
#define SYSCON_MS1_WT3      (SYSCON_MS0_WT3 << 6)
#define SYSCON_MS1_PIPE1    (SYSCON_MS0_PIPE1 << 6)
#define SYSCON_MS1_PIPE2    (SYSCON_MS0_PIPE2 << 6)
#define SYSCON_MS1_PIPE3    (SYSCON_MS0_PIPE3 << 6)
#define SYSCON_MS1_PIPE4    (SYSCON_MS0_PIPE4 << 6)
#define SYSCON_MS1_SLOW     (SYSCON_MS0_SLOW << 6)
#define SYSCON_MSH_IDLE     (SYSCON_MS0_IDLE << 12)
#define SYSCON_MSH_WT0      (SYSCON_MS0_WT0 << 12)
#define SYSCON_MSH_WT1      (SYSCON_MS0_WT1 << 12)
#define SYSCON_MSH_WT2      (SYSCON_MS0_WT2 << 12)
#define SYSCON_MSH_WT3      (SYSCON_MS0_WT3 << 12)
#define SYSCON_MSH_PIPE1    (SYSCON_MS0_PIPE1 << 12)
#define SYSCON_MSH_PIPE2    (SYSCON_MS0_PIPE2 << 12)
#define SYSCON_MSH_PIPE3    (SYSCON_MS0_PIPE3 << 12)
#define SYSCON_MSH_PIPE4    (SYSCON_MS0_PIPE4 << 12)
#define SYSCON_MSH_SLOW     (SYSCON_MS0_SLOW << 12)
#define SYSCON_MEM_WID64    (0x00080000)
#define SYSCON_MP_WID64     (0x00100000)
#define SYSCON_HOST_WID64   (0x00200000)

/* ************** SDRCON register With Bit Masks ******************** */
#define	SDRCON_LOC		    (0x180484)

/* Bit Masks */
#define SDRCON_ENBL         (0x00000001)
#define SDRCON_CLAT1        (0x00000000)
#define SDRCON_CLAT2        (0x00000002)
#define SDRCON_CLAT3        (0x00000004)
#define SDRCON_PIPE1        (0x00000008)
#define SDRCON_PG256        (0x00000000)
#define SDRCON_PG512        (0x00000010)
#define SDRCON_PG1K         (0x00000020)
#define SDRCON_REF600       (0x00000000)
#define SDRCON_REF900       (0x00000080)
#define SDRCON_REF1200      (0x00000100)
#define SDRCON_REF2400      (0x00000180)
#define SDRCON_PC2RAS2      (0x00000000)
#define SDRCON_PC2RAS3      (0x00000200)
#define SDRCON_PC2RAS4      (0x00000400)
#define SDRCON_PC2RAS5      (0x00000600)
#define SDRCON_RAS2PC2      (0x00000000)
#define SDRCON_RAS2PC3      (0x00000800)
#define SDRCON_RAS2PC4      (0x00001000)
#define SDRCON_RAS2PC5      (0x00001800)
#define SDRCON_RAS2PC6      (0x00002000)
#define SDRCON_RAS2PC7      (0x00002800)
#define SDRCON_RAS2PC8      (0x00003000)
#define SDRCON_INIT         (0x00004000)

/* ****************** Link Buffer Registers ************************* */
#define	LBUFTX0_LOC         (0x1804A0)
#define	LBUFRX0_LOC         (0x1804A4)
#define	LBUFTX1_LOC         (0x1804A8)
#define	LBUFRX1_LOC         (0x1804AC)
#define	LBUFTX2_LOC         (0x1804B0)
#define	LBUFRX2_LOC         (0x1804B4)
#define	LBUFTX3_LOC         (0x1804B8)
#define	LBUFRX3_LOC         (0x1804BC)

/* *************** Link Control Registers with Bit Masks ************ */
#define	LCTL0_LOC           (0x1804E0)
#define	LCTL1_LOC           (0x1804E1)
#define	LCTL2_LOC           (0x1804E2)
#define	LCTL3_LOC           (0x1804E3)

/* Bit Masks */
#define LCTL_DSBL           (0x00000000)
#define LCTL_VER            (0x00000004)
#define LCTL_DIV8           (0x00000000)
#define LCTL_DIV4           (0x00000008)
#define LCTL_DIV3           (0x00000010)
#define LCTL_DIV2           (0x00000018)
#define LCTL_LTEN           (0x00000040)
#define LCTL_PSIZE          (0x00000080)
#define LCTL_TTOE           (0x00000100)
#define LCTL_CERE           (0x00000200)
#define LCTL_LREN           (0x00000400)
#define LCTL_RTOE           (0x00000800)

/* *************** Link Status Registers with Bit Masks ************* */
#define       LSTAT0_LOC          (0x1804F0)
#define       LSTAT1_LOC          (0x1804F1)
#define       LSTAT2_LOC          (0x1804F2)
#define       LSTAT3_LOC          (0x1804F3)
#define       LSTATC0_LOC         (0x1804F8)
#define       LSTATC1_LOC         (0x1804F9)
#define       LSTATC2_LOC         (0x1804FA)
#define       LSTATC3_LOC         (0x1804FB)

/* Bit Masks */
#define LSTAT_RER           (0x00000003)
#define LSTAT_RST           (0x0000000C)
#define LSTAT_TER           (0x00000030)
#define LSTAT_TST           (0x000000C0)

/* ********************* BTB Registers ****************************** */

/* Tags - Way 0 */
#define	BTB_WAY0_TG0_LOC    (0x180600)
#define	BTB_WAY0_TG1_LOC    (0x180601)
#define	BTB_WAY0_TG2_LOC    (0x180602)
#define	BTB_WAY0_TG3_LOC    (0x180603)
#define	BTB_WAY0_TG4_LOC    (0x180604)
#define	BTB_WAY0_TG5_LOC    (0x180605)
#define	BTB_WAY0_TG6_LOC    (0x180606)
#define	BTB_WAY0_TG7_LOC    (0x180607)
#define	BTB_WAY0_TG8_LOC    (0x180608)
#define	BTB_WAY0_TG9_LOC    (0x180609)
#define	BTB_WAY0_TG10_LOC   (0x18060A)
#define	BTB_WAY0_TG11_LOC   (0x18060B)
#define	BTB_WAY0_TG12_LOC   (0x18060C)
#define	BTB_WAY0_TG13_LOC   (0x18060D)
#define	BTB_WAY0_TG14_LOC   (0x18060E)
#define	BTB_WAY0_TG15_LOC   (0x18060F)
#define	BTB_WAY0_TG16_LOC   (0x180610)
#define	BTB_WAY0_TG17_LOC   (0x180611)
#define	BTB_WAY0_TG18_LOC   (0x180612)
#define	BTB_WAY0_TG19_LOC   (0x180613)
#define	BTB_WAY0_TG20_LOC   (0x180614)
#define	BTB_WAY0_TG21_LOC   (0x180615)
#define	BTB_WAY0_TG22_LOC   (0x180616)
#define	BTB_WAY0_TG23_LOC   (0x180617)
#define	BTB_WAY0_TG24_LOC   (0x180618)
#define	BTB_WAY0_TG25_LOC   (0x180619)
#define	BTB_WAY0_TG26_LOC   (0x18061A)
#define	BTB_WAY0_TG27_LOC   (0x18061B)
#define	BTB_WAY0_TG28_LOC   (0x18061C)
#define	BTB_WAY0_TG29_LOC   (0x18061D)
#define	BTB_WAY0_TG30_LOC   (0x18061E)
#define	BTB_WAY0_TG31_LOC   (0x18061F)

/* Tags - Way 1 */
#define	BTB_WAY1_TG0_LOC    (0x180620)
#define	BTB_WAY1_TG1_LOC    (0x180621)
#define	BTB_WAY1_TG2_LOC    (0x180622)
#define	BTB_WAY1_TG3_LOC    (0x180623)
#define	BTB_WAY1_TG4_LOC    (0x180624)
#define	BTB_WAY1_TG5_LOC    (0x180625)
#define	BTB_WAY1_TG6_LOC    (0x180626)
#define	BTB_WAY1_TG7_LOC    (0x180627)
#define	BTB_WAY1_TG8_LOC    (0x180628)
#define	BTB_WAY1_TG9_LOC    (0x180629)
#define	BTB_WAY1_TG10_LOC   (0x18062A)
#define	BTB_WAY1_TG11_LOC   (0x18062B)
#define	BTB_WAY1_TG12_LOC   (0x18062C)
#define	BTB_WAY1_TG13_LOC   (0x18062D)
#define	BTB_WAY1_TG14_LOC   (0x18062E)
#define	BTB_WAY1_TG15_LOC   (0x18062F)
#define	BTB_WAY1_TG16_LOC   (0x180630)
#define	BTB_WAY1_TG17_LOC   (0x180631)
#define	BTB_WAY1_TG18_LOC   (0x180632)
#define	BTB_WAY1_TG19_LOC   (0x180633)
#define	BTB_WAY1_TG20_LOC   (0x180634)
#define	BTB_WAY1_TG21_LOC   (0x180635)
#define	BTB_WAY1_TG22_LOC   (0x180636)
#define	BTB_WAY1_TG23_LOC   (0x180637)
#define	BTB_WAY1_TG24_LOC   (0x180638)
#define	BTB_WAY1_TG25_LOC   (0x180639)
#define	BTB_WAY1_TG26_LOC   (0x18063A)
#define	BTB_WAY1_TG27_LOC   (0x18063B)
#define	BTB_WAY1_TG28_LOC   (0x18063C)
#define	BTB_WAY1_TG29_LOC   (0x18063D)
#define	BTB_WAY1_TG30_LOC   (0x18063E)
#define	BTB_WAY1_TG31_LOC   (0x18063F)

/* Tags - Way 2 */
#define	BTB_WAY2_TG0_LOC    (0x180640)
#define	BTB_WAY2_TG1_LOC    (0x180641)
#define	BTB_WAY2_TG2_LOC    (0x180642)
#define	BTB_WAY2_TG3_LOC    (0x180643)
#define	BTB_WAY2_TG4_LOC    (0x180644)
#define	BTB_WAY2_TG5_LOC    (0x180645)
#define	BTB_WAY2_TG6_LOC    (0x180646)
#define	BTB_WAY2_TG7_LOC    (0x180647)
#define	BTB_WAY2_TG8_LOC    (0x180648)
#define	BTB_WAY2_TG9_LOC    (0x180649)
#define	BTB_WAY2_TG10_LOC   (0x18064A)
#define	BTB_WAY2_TG11_LOC   (0x18064B)
#define	BTB_WAY2_TG12_LOC   (0x18064C)
#define	BTB_WAY2_TG13_LOC   (0x18064D)
#define	BTB_WAY2_TG14_LOC   (0x18064E)
#define	BTB_WAY2_TG15_LOC   (0x18064F)
#define	BTB_WAY2_TG16_LOC   (0x180650)
#define	BTB_WAY2_TG17_LOC   (0x180651)
#define	BTB_WAY2_TG18_LOC   (0x180652)
#define	BTB_WAY2_TG19_LOC   (0x180653)
#define	BTB_WAY2_TG20_LOC   (0x180654)
#define	BTB_WAY2_TG21_LOC   (0x180655)
#define	BTB_WAY2_TG22_LOC   (0x180656)
#define	BTB_WAY2_TG23_LOC   (0x180657)
#define	BTB_WAY2_TG24_LOC   (0x180658)
#define	BTB_WAY2_TG25_LOC   (0x180659)
#define	BTB_WAY2_TG26_LOC   (0x18065A)
#define	BTB_WAY2_TG27_LOC   (0x18065B)
#define	BTB_WAY2_TG28_LOC   (0x18065C)
#define	BTB_WAY2_TG29_LOC   (0x18065D)
#define	BTB_WAY2_TG30_LOC   (0x18065E)
#define	BTB_WAY2_TG31_LOC   (0x18065F)

/* Tags - Way 3 */
#define	BTB_WAY3_TG0_LOC    (0x180660)
#define	BTB_WAY3_TG1_LOC    (0x180661)
#define	BTB_WAY3_TG2_LOC    (0x180662)
#define	BTB_WAY3_TG3_LOC    (0x180663)
#define	BTB_WAY3_TG4_LOC    (0x180664)
#define	BTB_WAY3_TG5_LOC    (0x180665)
#define	BTB_WAY3_TG6_LOC    (0x180666)
#define	BTB_WAY3_TG7_LOC    (0x180667)
#define	BTB_WAY3_TG8_LOC    (0x180668)
#define	BTB_WAY3_TG9_LOC    (0x180669)
#define	BTB_WAY3_TG10_LOC   (0x18066A)
#define	BTB_WAY3_TG11_LOC   (0x18066B)
#define	BTB_WAY3_TG12_LOC   (0x18066C)
#define	BTB_WAY3_TG13_LOC   (0x18066D)
#define	BTB_WAY3_TG14_LOC   (0x18066E)
#define	BTB_WAY3_TG15_LOC   (0x18066F)
#define	BTB_WAY3_TG16_LOC   (0x180670)
#define	BTB_WAY3_TG17_LOC   (0x180671)
#define	BTB_WAY3_TG18_LOC   (0x180672)
#define	BTB_WAY3_TG19_LOC   (0x180673)
#define	BTB_WAY3_TG20_LOC   (0x180674)
#define	BTB_WAY3_TG21_LOC   (0x180675)
#define	BTB_WAY3_TG22_LOC   (0x180676)
#define	BTB_WAY3_TG23_LOC   (0x180677)
#define	BTB_WAY3_TG24_LOC   (0x180678)
#define	BTB_WAY3_TG25_LOC   (0x180679)
#define	BTB_WAY3_TG26_LOC   (0x18067A)
#define	BTB_WAY3_TG27_LOC   (0x18067B)
#define	BTB_WAY3_TG28_LOC   (0x18067C)
#define	BTB_WAY3_TG29_LOC   (0x18067D)
#define	BTB_WAY3_TG30_LOC   (0x18067E)
#define	BTB_WAY3_TG31_LOC   (0x18067F)

/* Targets - Way 0 */
#define	BTB_WAY0_TR0_LOC    (0x180680)
#define	BTB_WAY0_TR1_LOC    (0x180681)
#define	BTB_WAY0_TR2_LOC    (0x180682)
#define	BTB_WAY0_TR3_LOC    (0x180683)
#define	BTB_WAY0_TR4_LOC    (0x180684)
#define	BTB_WAY0_TR5_LOC    (0x180685)
#define	BTB_WAY0_TR6_LOC    (0x180686)
#define	BTB_WAY0_TR7_LOC    (0x180687)
#define	BTB_WAY0_TR8_LOC    (0x180688)
#define	BTB_WAY0_TR9_LOC    (0x180689)
#define	BTB_WAY0_TR10_LOC   (0x18068A)
#define	BTB_WAY0_TR11_LOC   (0x18068B)
#define	BTB_WAY0_TR12_LOC   (0x18068C)
#define	BTB_WAY0_TR13_LOC   (0x18068D)
#define	BTB_WAY0_TR14_LOC   (0x18068E)
#define	BTB_WAY0_TR15_LOC   (0x18068F)
#define	BTB_WAY0_TR16_LOC   (0x180690)
#define	BTB_WAY0_TR17_LOC   (0x180691)
#define	BTB_WAY0_TR18_LOC   (0x180692)
#define	BTB_WAY0_TR19_LOC   (0x180693)
#define	BTB_WAY0_TR20_LOC   (0x180694)
#define	BTB_WAY0_TR21_LOC   (0x180695)
#define	BTB_WAY0_TR22_LOC   (0x180696)
#define	BTB_WAY0_TR23_LOC   (0x180697)
#define	BTB_WAY0_TR24_LOC   (0x180698)
#define	BTB_WAY0_TR25_LOC   (0x180699)
#define	BTB_WAY0_TR26_LOC   (0x18069A)
#define	BTB_WAY0_TR27_LOC   (0x18069B)
#define	BTB_WAY0_TR28_LOC   (0x18069C)
#define	BTB_WAY0_TR29_LOC   (0x18069D)
#define	BTB_WAY0_TR30_LOC   (0x18069E)
#define	BTB_WAY0_TR31_LOC   (0x18069F)

/* Targets - Way 1 */
#define	BTB_WAY1_TR0_LOC    (0x1806A0)
#define	BTB_WAY1_TR1_LOC    (0x1806A1)
#define	BTB_WAY1_TR2_LOC    (0x1806A2)
#define	BTB_WAY1_TR3_LOC    (0x1806A3)
#define	BTB_WAY1_TR4_LOC    (0x1806A4)
#define	BTB_WAY1_TR5_LOC    (0x1806A5)
#define	BTB_WAY1_TR6_LOC    (0x1806A6)
#define	BTB_WAY1_TR7_LOC    (0x1806A7)
#define	BTB_WAY1_TR8_LOC    (0x1806A8)
#define	BTB_WAY1_TR9_LOC    (0x1806A9)
#define	BTB_WAY1_TR10_LOC   (0x1806AA)
#define	BTB_WAY1_TR11_LOC   (0x1806AB)
#define	BTB_WAY1_TR12_LOC   (0x1806AC)
#define	BTB_WAY1_TR13_LOC   (0x1806AD)
#define	BTB_WAY1_TR14_LOC   (0x1806AE)
#define	BTB_WAY1_TR15_LOC   (0x1806AF)
#define	BTB_WAY1_TR16_LOC   (0x1806B0)
#define	BTB_WAY1_TR17_LOC   (0x1806B1)
#define	BTB_WAY1_TR18_LOC   (0x1806B2)
#define	BTB_WAY1_TR19_LOC   (0x1806B3)
#define	BTB_WAY1_TR20_LOC   (0x1806B4)
#define	BTB_WAY1_TR21_LOC   (0x1806B5)
#define	BTB_WAY1_TR22_LOC   (0x1806B6)
#define	BTB_WAY1_TR23_LOC   (0x1806B7)
#define	BTB_WAY1_TR24_LOC   (0x1806B8)
#define	BTB_WAY1_TR25_LOC   (0x1806B9)
#define	BTB_WAY1_TR26_LOC   (0x1806BA)
#define	BTB_WAY1_TR27_LOC   (0x1806BB)
#define	BTB_WAY1_TR28_LOC   (0x1806BC)
#define	BTB_WAY1_TR29_LOC   (0x1806BD)
#define	BTB_WAY1_TR30_LOC   (0x1806BE)
#define	BTB_WAY1_TR31_LOC   (0x1806BF)

/* Targets - Way 2 */
#define	BTB_WAY2_TR0_LOC    (0x1806C0)
#define	BTB_WAY2_TR1_LOC    (0x1806C1)
#define	BTB_WAY2_TR2_LOC    (0x1806C2)
#define	BTB_WAY2_TR3_LOC    (0x1806C3)
#define	BTB_WAY2_TR4_LOC    (0x1806C4)
#define	BTB_WAY2_TR5_LOC    (0x1806C5)
#define	BTB_WAY2_TR6_LOC    (0x1806C6)
#define	BTB_WAY2_TR7_LOC    (0x1806C7)
#define	BTB_WAY2_TR8_LOC    (0x1806C8)
#define	BTB_WAY2_TR9_LOC    (0x1806C9)
#define	BTB_WAY2_TR10_LOC   (0x1806CA)
#define	BTB_WAY2_TR11_LOC   (0x1806CB)
#define	BTB_WAY2_TR12_LOC   (0x1806CC)
#define	BTB_WAY2_TR13_LOC   (0x1806CD)
#define	BTB_WAY2_TR14_LOC   (0x1806CE)
#define	BTB_WAY2_TR15_LOC   (0x1806CF)
#define	BTB_WAY2_TR16_LOC   (0x1806D0)
#define	BTB_WAY2_TR17_LOC   (0x1806D1)
#define	BTB_WAY2_TR18_LOC   (0x1806D2)
#define	BTB_WAY2_TR19_LOC   (0x1806D3)
#define	BTB_WAY2_TR20_LOC   (0x1806D4)
#define	BTB_WAY2_TR21_LOC   (0x1806D5)
#define	BTB_WAY2_TR22_LOC   (0x1806D6)
#define	BTB_WAY2_TR23_LOC   (0x1806D7)
#define	BTB_WAY2_TR24_LOC   (0x1806D8)
#define	BTB_WAY2_TR25_LOC   (0x1806D9)
#define	BTB_WAY2_TR26_LOC   (0x1806DA)
#define	BTB_WAY2_TR27_LOC   (0x1806DB)
#define	BTB_WAY2_TR28_LOC   (0x1806DC)
#define	BTB_WAY2_TR29_LOC   (0x1806DD)
#define	BTB_WAY2_TR30_LOC   (0x1806DE)
#define	BTB_WAY2_TR31_LOC   (0x1806DF)

/* Targets - Way 3 */
#define	BTB_WAY3_TR0_LOC    (0x1806E0)
#define	BTB_WAY3_TR1_LOC    (0x1806E1)
#define	BTB_WAY3_TR2_LOC    (0x1806E2)
#define	BTB_WAY3_TR3_LOC    (0x1806E3)
#define	BTB_WAY3_TR4_LOC    (0x1806E4)
#define	BTB_WAY3_TR5_LOC    (0x1806E5)
#define	BTB_WAY3_TR6_LOC    (0x1806E6)
#define	BTB_WAY3_TR7_LOC    (0x1806E7)
#define	BTB_WAY3_TR8_LOC    (0x1806E8)
#define	BTB_WAY3_TR9_LOC    (0x1806E9)
#define	BTB_WAY3_TR10_LOC   (0x1806EA)
#define	BTB_WAY3_TR11_LOC   (0x1806EB)
#define	BTB_WAY3_TR12_LOC   (0x1806EC)
#define	BTB_WAY3_TR13_LOC   (0x1806ED)
#define	BTB_WAY3_TR14_LOC   (0x1806EE)
#define	BTB_WAY3_TR15_LOC   (0x1806EF)
#define	BTB_WAY3_TR16_LOC   (0x1806F0)
#define	BTB_WAY3_TR17_LOC   (0x1806F1)
#define	BTB_WAY3_TR18_LOC   (0x1806F2)
#define	BTB_WAY3_TR19_LOC   (0x1806F3)
#define	BTB_WAY3_TR20_LOC   (0x1806F4)
#define	BTB_WAY3_TR21_LOC   (0x1806F5)
#define	BTB_WAY3_TR22_LOC   (0x1806F6)
#define	BTB_WAY3_TR23_LOC   (0x1806F7)
#define	BTB_WAY3_TR24_LOC   (0x1806F8)
#define	BTB_WAY3_TR25_LOC   (0x1806F9)
#define	BTB_WAY3_TR26_LOC   (0x1806FA)
#define	BTB_WAY3_TR27_LOC   (0x1806FB)
#define	BTB_WAY3_TR28_LOC   (0x1806FC)
#define	BTB_WAY3_TR29_LOC   (0x1806FD)
#define	BTB_WAY3_TR30_LOC   (0x1806FE)
#define	BTB_WAY3_TR31_LOC   (0x1806FF)

/* ******************* Interrupt Vectors **************************** */

#define IVTIMER0LP_LOC      (0x180702)
#define IVTIMER1LP_LOC      (0x180703)
#define IVLINK0_LOC         (0x180706)
#define IVLINK1_LOC         (0x180707)
#define IVLINK2_LOC         (0x180708)
#define IVLINK3_LOC         (0x180709)
#define IVDMA0_LOC          (0x18070E)
#define IVDMA1_LOC          (0x18070F)
#define IVDMA2_LOC          (0x180710)
#define IVDMA3_LOC          (0x180711)
#define IVDMA4_LOC          (0x180716)
#define IVDMA5_LOC          (0x180717)
#define IVDMA6_LOC          (0x180718)
#define IVDMA7_LOC          (0x180719)
#define IVDMA8_LOC          (0x18071D)
#define IVDMA9_LOC          (0x18071E)
#define IVDMA10_LOC         (0x18071F)
#define IVDMA11_LOC         (0x180720)
#define IVDMA12_LOC         (0x180725)
#define IVDMA13_LOC         (0x180726)
#define IVIRQ0_LOC          (0x180729)
#define IVIRQ1_LOC          (0x18072A)
#define IVIRQ2_LOC          (0x18072B)
#define IVIRQ3_LOC          (0x18072C)
#define VIRPT_LOC           (0x180730)
#define IVBUSLK_LOC         (0x180732)
#define IVBUSLOCK_LOC       (0x180732)
#define IVTIMER0HP_LOC      (0x180734)
#define IVTIMER1HP_LOC      (0x180735)
#define IVHW_LOC            (0x180739)
#define IVSW_LOC            (0x18073E)

/* ****************************************************************** */

#define	AUTODMA0_LOC        (0x180740)
#define	AUTODMA1_LOC        (0x180744)

/* ******************* Watchpoint Registers ************************* */

#define	WP0CTL_LOC          (0x1807A0)
#define	WP1CTL_LOC          (0x1807A1)
#define	WP2CTL_LOC          (0x1807A2)

/* Bit Masks */
/* OPMODE */
#define WPCTL_DSBL          (0x00000000)
#define WPCTL_ADDRESS       (0x00000001)
#define WPCTL_RANGE         (0x00000002)
#define WPCTL_NOTRANGE      (0x00000003)
/* BM */
#define WPCTL_SEQ           (0x00000004)
#define WPCTL_JALU          (0x00000008)
#define WPCTL_KALU          (0x00000010)
#define WPCTL_DMAI          (0x00000020)
#define WPCTL_BIU           (0x00000040)
#define WPCTL_SEQFETCH      (0x00000080)
/* R/W */
#define WPCTL_READ          (0x00000100)
#define WPCTL_WRITE         (0x00000200)
/* EXTYPE */
#define WPCTL_NOEXCEPT      (0x00000000)
#define WPCTL_EXCEPT        (0x00000400)
#define WPCTL_EMUTRAP       (0x00000800)
/* SSTP,WPOR,WPAND */
#define WPCTL_SSTP          (0x00001000)
#define WPCTL_WPOR          (0x00001000)
#define WPCTL_WPAND         (0x00001000)

#define	WP0STAT_LOC         (0x1807A4)
#define	WP1STAT_LOC         (0x1807A5)
#define	WP2STAT_LOC         (0x1807A6)

/* Bit positions (of the masks) */
#define WPSTAT_VALUE_P      (0)
#define WPSTAT_EX_P         (16)

/* Bit masks */
#define WPSTAT_VALUE        (0x0000FFFF)
#define WPSTAT_EX           (0x00030000)

#define	WP0L_LOC            (0x1807A8)
#define	WP0H_LOC            (0x1807A9)
#define	WP1L_LOC            (0x1807AA)
#define	WP1H_LOC            (0x1807AB)
#define	WP2L_LOC            (0x1807AC)
#define	WP2H_LOC            (0x1807AD)

/* ****************** Trace Buffer Registers ************************ */

#define	TRCB0_LOC           (0x1807C0)
#define	TRCB1_LOC           (0x1807C1)
#define	TRCB2_LOC           (0x1807C2)
#define	TRCB3_LOC           (0x1807C3)
#define	TRCB4_LOC           (0x1807C4)
#define	TRCB5_LOC           (0x1807C5)
#define	TRCB6_LOC           (0x1807C6)
#define	TRCB7_LOC           (0x1807C7)

/* *********************** Global memory **************************** */

#define BLOCK0_LOC          (0x00000000)  /* Internal memory block 0  */
#define BLOCK1_LOC          (0x00080000)  /* Internal memory block 1  */
#define BLOCK2_LOC          (0x00100000)  /* Internal memory block 2  */

#define P0_OFFSET_LOC       (0x02000000)  /* Processor ID0 MP memory offset */
#define P1_OFFSET_LOC       (0x02400000)  /* Processor ID1 MP memory offset */
#define P2_OFFSET_LOC       (0x02800000)  /* Processor ID2 MP memory offset */
#define P3_OFFSET_LOC       (0x02C00000)  /* Processor ID3 MP memory offset */
#define P4_OFFSET_LOC       (0x03000000)  /* Processor ID4 MP memory offset */
#define P5_OFFSET_LOC       (0x03400000)  /* Processor ID5 MP memory offset */
#define P6_OFFSET_LOC       (0x03800000)  /* Processor ID6 MP memory offset */
#define P7_OFFSET_LOC       (0x03C00000)  /* Processor ID7 MP memory offset */


#endif /* !defined(__DEFTS101_H_) */


